Conventional semiconductor switch devices for very large scale integration (VLSI) applications include complementary metal oxide semiconductor (CMOS) switches. A CMOS switch typically comprises a field effect transistor having a conduction channel extending in a silicon substrate between a source electrode and a drain electrode. A gate electrode is disposed on the substrate between the source and drain. Conventionally, the gate electrode is insulated from the channel by a gate dielectric layer of silicon dioxide. In operation, the flow of current through the channel between the source and drain is controlled by application of voltage to the gate.
To date, the performance of microprocessors based on CMOS technology has increased with time in a substantially exponential fashion. This continuing increase in microprocessor performance has been at least partially facilitated by continuing reductions in CMOS device feature size. The thickness of the gate dielectric is reduced in correspondence to reduction in feature size. However, as the feature size is reduced beyond 0.1 micro-meter, the thickness of the gate dielectric becomes so small that electrical breakdown occurs between the gate and channel where silicon dioxide is employed the gate dielectric material. Upon breakdown, the gate dielectric layer becomes electrically conductive. Clearly, this effect is undesirable, and places a lower limit on the degree to which CMOS devices can be scaled with silicon dioxide as the gate dielectric material. Accordingly, it would be desirable to provide a dielectric alternative to silicon dioxide that permits continuing reduction in device feature size and thus a continuing increase in microprocessor performance. Silicon dioxide has a static dielectric constant (K) of around 4.0. It would be desirable to provide a gate dielectric material having a K value substantially higher than that of silicon dioxide. Such a material would permit thinner gate dielectric layers than presently possible with silicon dioxide while preserving current CMOS semiconductor technology. Gate dielectric layers of a thickness in the region of 2 nm or less would be preferable.
Al2O3 is one material that has been investigated as an alternative gate dielectric material for replacing silicon dioxide. The K value associated with Al2O3 is about 10. However, a problem associated with Al2O3 is that it introduces a significant decrease in charge carrier mobility with respect to silicon dioxide. Another problem associated with Al2O3 as a gate dielectric material is that it is susceptible to boron diffusion. Boron is regularly employed as a dopant in CMOS devices for producing Ohmic contacts and the like. Diffusion of boron into the gate dielectric layer produces an unwanted degradation of the dielectric properties of the gate dielectric layer. In addition, a layer of silicon dioxide typically forms at the interface between the Al2O3 and the silicon. This silicon dioxide layer further reduces the effective K value. These problems have generally discouraged further efforts into investigating Al2O3 as a replacement for silicon dioxide as a gate dielectric materials for CMOS devices.